Features:
These 8-bit shift registers feature gated serial inputs and an asynchronous clear.
A low logic level at either input inhibits entry of the new data, and resets the first flip-flop to the low level at the next clock pulse, thus providing complete control over incoming data.
A high logic level on either input enables the other input, which will then determine the state of the first flip-flop.
Data at the serial inputs may be changed while the clock is HIGH or LOW, but only information meeting the setup and hold time requirements will be entered.
Clocking occurs on the LOW-to-HIGH level transition of the clock input.
All inputs are diode-clamped to minimize transmission-line effects.
Gated (enable/disable) serial inputs.
Fully buffered clock and serial inputs.
Asynchronous clear.
Pin Assignments:
Specifications:
Datasheet
DM74LS164N
Product Category
Logic ICs
Series
LS
Model
DM74LS164N
Logic Type
Bipolar
Function
Shift Register
Counting Sequence
Serial to Parallel
Package/Case
DIP-14
Mounting Style
Through Hole
Number of Circuits
1 Circuit
Number of Bits
8 bit
Number of Input Lines
2
Number of Output Lines
8
Propagation Delay Time
40 ns
Supply Voltage Max
5.25 V
Supply Voltage Min
4.75 V
Typical clock frequency
36 MHz
Typical power dissipation
80 mW
Operating Temperature
0 C to + 70 C
Datasheet:
DM74LS164N
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